<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>Architecture Day 2020 Archives - BenchLife.info</title>
	<atom:link href="https://benchlife.info/tag/architecture-day-2020/feed/" rel="self" type="application/rss+xml" />
	<link>https://benchlife.info/tag/architecture-day-2020/</link>
	<description>專注科技產業的趨勢報導與分析</description>
	<lastBuildDate>Fri, 14 Aug 2020 02:58:29 +0000</lastBuildDate>
	<language>zh-TW</language>
	<sy:updatePeriod>
	hourly	</sy:updatePeriod>
	<sy:updateFrequency>
	1	</sy:updateFrequency>
	<generator>https://wordpress.org/?v=6.9.4</generator>

<image>
	<url>https://benchlife.info/wp-content/uploads/2019/04/Transparent@512pw.png</url>
	<title>Architecture Day 2020 Archives - BenchLife.info</title>
	<link>https://benchlife.info/tag/architecture-day-2020/</link>
	<width>32</width>
	<height>32</height>
</image> 
	<item>
		<title>Intel 架構日端出 SuperFin 與 Super MIM，先進製程電晶體效能有解</title>
		<link>https://benchlife.info/intel-architecture-day-superfin-supermim/</link>
		
		<dc:creator><![CDATA[Raymond Fu]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:34:30 +0000</pubDate>
				<category><![CDATA[製造、設計與半導體]]></category>
		<category><![CDATA[10nm SuperFin]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[Intel]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34091</guid>

					<description><![CDATA[<p>近期 Intel 執行長 Bob Swan 大方承認自家 7nm 製程相較原先預計時程延後許多，但於 [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-architecture-day-superfin-supermim/">Intel 架構日端出 SuperFin 與 Super MIM，先進製程電晶體效能有解</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>支援 DDR5、PCIe Gen5 與 CXL 1.1，Intel 計畫 2021 年發表 Sapphire Rapids 平台</title>
		<link>https://benchlife.info/intel-sapphire-rapids-with-ddr5-pcie-gen5-cxl-launch-2021-with-10nm-enhanced-superfin/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:01:28 +0000</pubDate>
				<category><![CDATA[硬體零組件]]></category>
		<category><![CDATA[處理器]]></category>
		<category><![CDATA[10nm SuperFin]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[CPU]]></category>
		<category><![CDATA[Data Center]]></category>
		<category><![CDATA[Ice Lake]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[Sapphire Rapids]]></category>
		<category><![CDATA[Xeon]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34057</guid>

					<description><![CDATA[<p>Data Center 方面也有部分新產品在 Architecture Day 2020 活動中提到 [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-sapphire-rapids-with-ddr5-pcie-gen5-cxl-launch-2021-with-10nm-enhanced-superfin/">支援 DDR5、PCIe Gen5 與 CXL 1.1，Intel 計畫 2021 年發表 Sapphire Rapids 平台</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>Intel：144 層 3D NAND、二代 3D XPoint 與 Rambo Cache 準備就緒</title>
		<link>https://benchlife.info/intel-offer-complete-hierachy-with-3d-nand-3d-xpoint-persistent-memory-rambo-cache-to-customer/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:00:39 +0000</pubDate>
				<category><![CDATA[儲存裝置與設備]]></category>
		<category><![CDATA[3D TLC NAND Flash]]></category>
		<category><![CDATA[3D XPoint]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[Storage]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34037</guid>

					<description><![CDATA[<p>CPU、GPU 以外，儲存也是 Intel 這家公司相當重要的一個部分。Intel Non-Vola [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-offer-complete-hierachy-with-3d-nand-3d-xpoint-persistent-memory-rambo-cache-to-customer/">Intel：144 層 3D NAND、二代 3D XPoint 與 Rambo Cache 準備就緒</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>整合 Golden Cove 與 Gracemont 處理器架構，Intel 計畫在 2021 年發表 Alder Lake 平台</title>
		<link>https://benchlife.info/intel-alder-lake-will-take-golden-cove-and-gracemont-with-10nm-superfin/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:00:37 +0000</pubDate>
				<category><![CDATA[硬體零組件]]></category>
		<category><![CDATA[處理器]]></category>
		<category><![CDATA[10nm SuperFin]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[CPU]]></category>
		<category><![CDATA[Foveros 3D]]></category>
		<category><![CDATA[Golden Cove]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[x86]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34024</guid>

					<description><![CDATA[<p>近期對於 Alder Lake 的資訊在網路並不少見到，同樣的，Intel 在 Architectu [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-alder-lake-will-take-golden-cove-and-gracemont-with-10nm-superfin/">整合 Golden Cove 與 Gracemont 處理器架構，Intel 計畫在 2021 年發表 Alder Lake 平台</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>Xe-LP 規格細節與 Gen11 比較，Intel 同步展示 Xe-HP 實驗室效能</title>
		<link>https://benchlife.info/intel-xe-lp-detail-and-xe-hp-first-demo/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:00:29 +0000</pubDate>
				<category><![CDATA[硬體零組件]]></category>
		<category><![CDATA[顯示卡與螢幕]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[GPU]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[Xe]]></category>
		<category><![CDATA[Xe-LP]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34065</guid>

					<description><![CDATA[<p>從過去的「Gen」世代 iGPU 更換至全新的 Xe GPU 架構，對於 Intel 這家 x86  [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-xe-lp-detail-and-xe-hp-first-demo/">Xe-LP 規格細節與 Gen11 比較，Intel 同步展示 Xe-HP 實驗室效能</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>鎖定高效能 PC 遊戲應用市場，Xe-HPG 加入 Intel Xe GPU 家族</title>
		<link>https://benchlife.info/intel-xe-hpg-with-gddr6-will-focus-high-performance-gaming-area-to-compete-nvidia-amd/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:00:27 +0000</pubDate>
				<category><![CDATA[硬體零組件]]></category>
		<category><![CDATA[顯示卡與螢幕]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[Foveros 3D]]></category>
		<category><![CDATA[GPU]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[Xe]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=34031</guid>

					<description><![CDATA[<p>Intel 財報揭露自家 7nm 製程產品會較原先規劃的時間晚 6 個月，而自家 7nm 製程則是推 [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-xe-hpg-with-gddr6-will-focus-high-performance-gaming-area-to-compete-nvidia-amd/">鎖定高效能 PC 遊戲應用市場，Xe-HPG 加入 Intel Xe GPU 家族</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
		<item>
		<title>Tiger Lake SoC：Intel 10nm SuperFin 製程、Willow Cove 與 Xe-LP GPU 架構</title>
		<link>https://benchlife.info/intel-10nm-superfin-tiger-lake-soc-with-willow-cove-and-xe-lp-detail/</link>
		
		<dc:creator><![CDATA[Chris.L]]></dc:creator>
		<pubDate>Thu, 13 Aug 2020 13:00:13 +0000</pubDate>
				<category><![CDATA[硬體零組件]]></category>
		<category><![CDATA[處理器]]></category>
		<category><![CDATA[10nm SuperFin]]></category>
		<category><![CDATA[Architecture Day 2020]]></category>
		<category><![CDATA[CPU]]></category>
		<category><![CDATA[Intel]]></category>
		<category><![CDATA[SoC]]></category>
		<category><![CDATA[Tiger Lake]]></category>
		<category><![CDATA[x86]]></category>
		<guid isPermaLink="false">https://benchlife.info/?p=33996</guid>

					<description><![CDATA[<p>Intel 在 Architecture 2020 活動上，率先揭露採用 Willow Cove 處 [&#8230;]</p>
<p>這篇文章 <a href="https://benchlife.info/intel-10nm-superfin-tiger-lake-soc-with-willow-cove-and-xe-lp-detail/">Tiger Lake SoC：Intel 10nm SuperFin 製程、Willow Cove 與 Xe-LP GPU 架構</a> 最早出現於 <a href="https://benchlife.info">BenchLife.info</a>。</p>
]]></description>
		
		
		
			</item>
	</channel>
</rss>
